A DS-CDMA multi-stage inter-path interference canceller for high bit rates

Third generation (3G) mobile communication systems can provide high data rates with spectrum efficiency over multipath fading channels. In order to make that feasible, they use low processing gains while maintain fixed bandwidth. For the lowest spreading gains multiple access interference (MAI) can be considered low and inter-path interference (IPI) becomes the principal factor for performance degradation of the conventional RAKE receiver. In this paper, we adapt the approach of interference cancellation, a well-known technique for multiuser detection, to mitigate the effects of self-interference in a single-user direct sequence code division multiple access (DS-CDMA) system over high data rate connections. We introduce an interference canceller (IC) which aims to improve system performance by regenerating and then subtracting, estimates of the interfering signals, embedded in the initial correlator output and channel estimation. By repeating this operation in a multistage scheme, we can improve significantly system performance at high data rates. Also, we propose an architecture for this repeating cancellation scheme and we discuss its calculation power requirements.