A simple fault-tolerant digital voter circuit in TMR nanoarchitectures

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Nanoelectronic systems are now more and more pr one to faults and defects, permanent or transient. Redundancy te chniques are implemented widely to increase the reliability, especially the TMR - Triple Modular Redundancy. However, many researchers assume that the voter is perfect and this may not be true. This paper proposes a simple but effective fault-tolerant voter circuit which is more reliable and less expensive. Experimental results demonstrate its improvement over the fo rmer TMR structures.

Original languageEnglish
Title of host publicationProceedings of the 8th IEEE International NEWCAS Conference, NEWCAS2010
Pages269-272
Number of pages4
DOIs
Publication statusPublished - 22 Nov 2010
Externally publishedYes
Event8th IEEE International NEWCAS Conference, NEWCAS 2010 - Montreal, QC, Canada
Duration: 20 Jun 201023 Jun 2010

Publication series

NameProceedings of the 8th IEEE International NEWCAS Conference, NEWCAS2010

Conference

Conference8th IEEE International NEWCAS Conference, NEWCAS 2010
Country/TerritoryCanada
CityMontreal, QC
Period20/06/1023/06/10

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