A survey on two-dimensional Error Correction Codes applied to fault-tolerant systems

  • David Freitas
  • , César Marcon
  • , Jarbas Silveira
  • , Lirida Naviner
  • , João Mota

Research output: Contribution to journalReview articlepeer-review

Abstract

The number of memory faults operating in radiation environments increases with the electronic device miniaturization. One-dimensional (1D) Error Correction Codes (ECCs) are not efficient in mitigating these problems requiring two-dimensional (2D)-ECCs for providing superior error correction capacity with proportionally less energy and area consumption. The significant increase in publications in this area demands a study to guide and subsidize research decisions, mainly to determine a standardization method for comparing and evaluating ECCs. We propose a Systematic Literature Review (SLR) to investigate the most important features of 2D-ECCs used for mitigating faults in memories. This SLR revealed the most used ECCs, data size and redundancy overhead, encoder and decoder implementation technology, fault injection methods, and evaluation metrics. Besides, we extracted some ECC trends, such as reusing the encoder inside the decoder and targeting the three-dimensional (3D)-ECC to increase the error correction efficacy. The experimental results describe important research decisions of great value for this scientific community.

Original languageEnglish
Article number114826
JournalMicroelectronics Reliability
Volume139
DOIs
Publication statusPublished - 1 Dec 2022

Keywords

  • 2D-ECC
  • Error Correction Code (ECC)
  • Fault tolerance
  • Reliability

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