TY - GEN
T1 - An efficient modeling and execution framework for complex systems development
AU - Perseil, Isabelle
AU - Pautet, Laurent
AU - Rolland, Jean François
AU - Filali, Mamoun
AU - Delanote, Didier
AU - Van Baelen, Stefan
AU - Joosen, Wouter
AU - Berbers, Yolande
AU - Mallet, Fréderic
AU - Bertrand, Dominique
AU - Faucou, Sébastien
AU - Zitouni, Abdelhafid
AU - Boufaida, Mahmoud
AU - Seinturier, Lionel
AU - Champeau, Joel
AU - Abdoul, Thomas
AU - Feiler, Peter H.
AU - Mraidha, Chokri
AU - Gérard, Sébastien
PY - 2011/7/25
Y1 - 2011/7/25
N2 - In this paper, we present different modeling and execution frameworks that allow us to efficiently analyze, design and verify complex systems, mainly to cope with the specific concerns of the Real-time and embedded systems (RTE) domain. First we depict a UML1/MARTE2 based methodology for executable RTE systems modeling with a framework and its underlying model transformations required to execute UML models conforming to the MARTE standard. The advantages of adopting a more generic action language with formal features are highlighted, in order to raise the level of abstraction with formal features. Then, we investigate how MARTE, with its Time Model facilities, can be made to represent faithfully AADL3 periodic/aperiodic tasks communicating through event or data ports, in an approach to end-to-end flow latency analysis. An analytical framework allows us to optimize port-based communication by generating a runtime executive that utilizes shared data areas where appropriate, while ensuring the timing semantic assumed by the control application. An analysis of the AADL mode change protocol is also provided, exposing a translation process that takes as an input an AADL model and produces as an output a time Petri net. We show how an AADL model transformation provides a formal model for model checking activities and we suggest that model transformation provides useful support to improve the integration of formal verification in an industrial engineering process. As a case study we use an implementation of a UDP4/IP5 protocol stack.
AB - In this paper, we present different modeling and execution frameworks that allow us to efficiently analyze, design and verify complex systems, mainly to cope with the specific concerns of the Real-time and embedded systems (RTE) domain. First we depict a UML1/MARTE2 based methodology for executable RTE systems modeling with a framework and its underlying model transformations required to execute UML models conforming to the MARTE standard. The advantages of adopting a more generic action language with formal features are highlighted, in order to raise the level of abstraction with formal features. Then, we investigate how MARTE, with its Time Model facilities, can be made to represent faithfully AADL3 periodic/aperiodic tasks communicating through event or data ports, in an approach to end-to-end flow latency analysis. An analytical framework allows us to optimize port-based communication by generating a runtime executive that utilizes shared data areas where appropriate, while ensuring the timing semantic assumed by the control application. An analysis of the AADL mode change protocol is also provided, exposing a translation process that takes as an input an AADL model and produces as an output a time Petri net. We show how an AADL model transformation provides a formal model for model checking activities and we suggest that model transformation provides useful support to improve the integration of formal verification in an industrial engineering process. As a case study we use an implementation of a UDP4/IP5 protocol stack.
U2 - 10.1109/ICECCS.2011.38
DO - 10.1109/ICECCS.2011.38
M3 - Conference contribution
AN - SCOPUS:79960535709
SN - 9780769543819
T3 - Proceedings - 2011 16th IEEE International Conference on Engineering of Complex Computer Systems, ICECCS 2011
SP - 317
EP - 331
BT - Proceedings - 2011 16th IEEE International Conference on Engineering of Complex Computer Systems, ICECCS 2011
T2 - 16th IEEE International Conference on Engineering of Complex Computer Systems, ICECCS 2011
Y2 - 27 April 2011 through 29 April 2011
ER -