An information theory perspective for the binary STT-MRAM cell operation channel

Spin-torque transfer magnetic random access memory (STT-MRAM) has emerged as a promising nonvolatile memory technology, with advantages, such as scalability, speed, endurance, and power consumption. This paper presents an STT-MRAM cell operation channel model with write and read operations for information theorists and error correction code designers. This model considers the effects of process variations and thermal fluctuations and considers all principle flaws during the fabrication and operation processes. With this model, evaluations are not only made for the write channel, the read channel, but also the write and read channel with metrics, such as operation failure rate, bit error rate, channel ergodic capacity, and channel outage probability at certain outage capacity. Moreover, it is proved that the distributions of written-in bit states are not uniformly distributed and are proportional to their respective write success probabilities. Finally, simulation results show that practical code rates and code block lengths can guarantee reliable performances only if the operation success rate difference between state 1 and state 0 is small enough.