An integrated digital architecture for the real-time reconstruction in a VSiP sensor

A. Kolar; T. Graba; A. Pinna; O. Romain; B. Granado; T. Ea

doi:10.1109/ICECS.2006.379740

An integrated digital architecture for the real-time reconstruction in a VSiP sensor

A. Kolar
, T. Graba
, A. Pinna
, O. Romain
, B. Granado
, T. Ea

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Recent advances in vision system integration allows to design new integrated sensors which are able to achieve complexes tasks. The 'Cyclope' project aims to develop a novel integrated sensor for real-time 3D reconstruction. It includes an active vision sensor, a digital centralized processing architecture and a communication block. This sensor is designed to obtain a monolithic integrate vision system. This paper presents the digital processing architecture which is a massively-parallel architecture in a totaly scalable IP to assure the compatibility with application constraints. This architecture has been implemented on an FPGA circuit and we demonstrate, with accurate results, the realtime operations.

Original language	English
Title of host publication	ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems
Pages	144-147
Number of pages	4
DOIs	https://doi.org/10.1109/ICECS.2006.379740
Publication status	Published - 1 Dec 2006
Event	ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems - Nice, France Duration: 10 Dec 2006 → 13 Dec 2006

Publication series

Name	Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Conference

Conference	ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems
Country/Territory	France
City	Nice
Period	10/12/06 → 13/12/06

Access to Document

10.1109/ICECS.2006.379740

Cite this

Kolar, A., Graba, T., Pinna, A., Romain, O., Granado, B., & Ea, T. (2006). An integrated digital architecture for the real-time reconstruction in a VSiP sensor. In ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems (pp. 144-147). Article 4263324 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems). https://doi.org/10.1109/ICECS.2006.379740

@inproceedings{c83cc16de0d24a3989a009de20b92070,

title = "An integrated digital architecture for the real-time reconstruction in a VSiP sensor",

abstract = "Recent advances in vision system integration allows to design new integrated sensors which are able to achieve complexes tasks. The 'Cyclope' project aims to develop a novel integrated sensor for real-time 3D reconstruction. It includes an active vision sensor, a digital centralized processing architecture and a communication block. This sensor is designed to obtain a monolithic integrate vision system. This paper presents the digital processing architecture which is a massively-parallel architecture in a totaly scalable IP to assure the compatibility with application constraints. This architecture has been implemented on an FPGA circuit and we demonstrate, with accurate results, the realtime operations.",

author = "A. Kolar and T. Graba and A. Pinna and O. Romain and B. Granado and T. Ea",

year = "2006",

month = dec,

day = "1",

doi = "10.1109/ICECS.2006.379740",

language = "English",

isbn = "1424403952",

series = "Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems",

pages = "144--147",

booktitle = "ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems",

note = "ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems ; Conference date: 10-12-2006 Through 13-12-2006",

}

Kolar, A, Graba, T, Pinna, A, Romain, O, Granado, B & Ea, T 2006, An integrated digital architecture for the real-time reconstruction in a VSiP sensor. in ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems., 4263324, Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, pp. 144-147, ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems, Nice, France, 10/12/06. https://doi.org/10.1109/ICECS.2006.379740

An integrated digital architecture for the real-time reconstruction in a VSiP sensor. / Kolar, A.; Graba, T.; Pinna, A. et al.
ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems. 2006. p. 144-147 4263324 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - An integrated digital architecture for the real-time reconstruction in a VSiP sensor

AU - Kolar, A.

AU - Graba, T.

AU - Pinna, A.

AU - Romain, O.

AU - Granado, B.

AU - Ea, T.

PY - 2006/12/1

Y1 - 2006/12/1

N2 - Recent advances in vision system integration allows to design new integrated sensors which are able to achieve complexes tasks. The 'Cyclope' project aims to develop a novel integrated sensor for real-time 3D reconstruction. It includes an active vision sensor, a digital centralized processing architecture and a communication block. This sensor is designed to obtain a monolithic integrate vision system. This paper presents the digital processing architecture which is a massively-parallel architecture in a totaly scalable IP to assure the compatibility with application constraints. This architecture has been implemented on an FPGA circuit and we demonstrate, with accurate results, the realtime operations.

AB - Recent advances in vision system integration allows to design new integrated sensors which are able to achieve complexes tasks. The 'Cyclope' project aims to develop a novel integrated sensor for real-time 3D reconstruction. It includes an active vision sensor, a digital centralized processing architecture and a communication block. This sensor is designed to obtain a monolithic integrate vision system. This paper presents the digital processing architecture which is a massively-parallel architecture in a totaly scalable IP to assure the compatibility with application constraints. This architecture has been implemented on an FPGA circuit and we demonstrate, with accurate results, the realtime operations.

U2 - 10.1109/ICECS.2006.379740

DO - 10.1109/ICECS.2006.379740

M3 - Conference contribution

AN - SCOPUS:47349093656

SN - 1424403952

SN - 9781424403950

T3 - Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

SP - 144

EP - 147

BT - ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems

T2 - ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems

Y2 - 10 December 2006 through 13 December 2006

ER -

Kolar A, Graba T, Pinna A, Romain O, Granado B, Ea T. An integrated digital architecture for the real-time reconstruction in a VSiP sensor. In ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems. 2006. p. 144-147. 4263324. (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems). doi: 10.1109/ICECS.2006.379740

An integrated digital architecture for the real-time reconstruction in a VSiP sensor

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