TY - GEN
T1 - Approximate Analytical Model Evaluating Digital Systems Compliance with Automotive Standards
AU - Goudet, Esther
AU - Sureau, Fabio
AU - Kaila, Manan
AU - Germe, Rémi
AU - Treviño, Luis Peña
AU - Daveau, Jean Marc
AU - Naviner, Lirida
AU - Roche, Philippe
N1 - Publisher Copyright:
© 2025 IEEE.
PY - 2025/1/1
Y1 - 2025/1/1
N2 - This paper revisits the existing Clustering Probabilistic Binomial Reliability (CPBR) approximate analytical model based on circuit partitioning and signal transfer matrices. It demonstrates the model’s relevance in assessing the correctness rate of logic gate netlists, in accordance with the ISO26262 road safety standard. The paper also highlights the model’s applicability to typical industrial circuit netlists. While prior work established the CPBR model’s ability to efficiently propagate signal error rates to circuit outputs with reasonable accuracy, no prior work has comprehensively compared its correctness rates to those of its reference Probabilistic Binomial Reliability (PBR) model. The novel CPBR implementation used in this paper enables, for the first time, a detailed accuracy comparison between the partitioning model and its reference across multiple circuits of the ISCAS’85 benchmark suite. Additionally, we provide an in-depth analysis of how this approximate method impacts the Automotive Safety Integrity Level (ASIL) for these circuits, identifying the optimal ASIL target for its application. Finally, we showcase the practical relevance of our approach by successfully applying it to the complex peripheral netlists of an industrial test-chip embedding a RISC-V core, demonstrating both its scalability and effectiveness in real-world scenarios.
AB - This paper revisits the existing Clustering Probabilistic Binomial Reliability (CPBR) approximate analytical model based on circuit partitioning and signal transfer matrices. It demonstrates the model’s relevance in assessing the correctness rate of logic gate netlists, in accordance with the ISO26262 road safety standard. The paper also highlights the model’s applicability to typical industrial circuit netlists. While prior work established the CPBR model’s ability to efficiently propagate signal error rates to circuit outputs with reasonable accuracy, no prior work has comprehensively compared its correctness rates to those of its reference Probabilistic Binomial Reliability (PBR) model. The novel CPBR implementation used in this paper enables, for the first time, a detailed accuracy comparison between the partitioning model and its reference across multiple circuits of the ISCAS’85 benchmark suite. Additionally, we provide an in-depth analysis of how this approximate method impacts the Automotive Safety Integrity Level (ASIL) for these circuits, identifying the optimal ASIL target for its application. Finally, we showcase the practical relevance of our approach by successfully applying it to the complex peripheral netlists of an industrial test-chip embedding a RISC-V core, demonstrating both its scalability and effectiveness in real-world scenarios.
KW - Analytical model
KW - Circuit partitioning
KW - Combinatorial analysis
KW - SETs
KW - SEUs
UR - https://www.scopus.com/pages/publications/105004728834
U2 - 10.1109/LATS65346.2025.10963951
DO - 10.1109/LATS65346.2025.10963951
M3 - Conference contribution
AN - SCOPUS:105004728834
T3 - 2025 IEEE 26th Latin American Test Symposium, LATS 2025
BT - 2025 IEEE 26th Latin American Test Symposium, LATS 2025
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 26th IEEE Latin American Test Symposium, LATS 2025
Y2 - 11 March 2025 through 14 March 2025
ER -