TY - GEN
T1 - Assisting refinement in system-on-chip design
AU - Mokrani, Hocine
AU - Ameur-Boulifa, Rabea
AU - Encrenaz-Tiphene, Emmanuelle
PY - 2013/12/1
Y1 - 2013/12/1
N2 - With the increasing complexity of systems on chip, designers have adopted layer design methodologies, where the description of systems is made by steps. Currently, those methods do not ensure the preservation of properties in the process of system development. In this paper we present a system on chip design method in order to guarantee the preservation of functional correctness along the design flow.
AB - With the increasing complexity of systems on chip, designers have adopted layer design methodologies, where the description of systems is made by steps. Currently, those methods do not ensure the preservation of properties in the process of system development. In this paper we present a system on chip design method in order to guarantee the preservation of functional correctness along the design flow.
M3 - Conference contribution
AN - SCOPUS:84891339183
SN - 9782953050486
T3 - Forum on Specification and Design Languages
BT - FDL 2013 - Proceedings of the 2013 Forum on Specification and Design Languages
T2 - 2013 16th Forum on Specification and Design Languages, FDL 2013
Y2 - 24 September 2013 through 26 September 2013
ER -