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Defect states on the surfaces of a P-type c-Si wafer and how they control the performance of a double heterojunction solar cell

  • Indian Association for the Cultivation of Science
  • Institut polytechnique de Paris

Research output: Contribution to journalArticlepeer-review

26 Citations (Scopus)

Abstract

"Heterojunction with intrinsic thin layer" solar cells combine the high efficiency of crystalline silicon (c-Si) cells, with the low cost of amorphous silicon technology. Here we use detailed numerical modeling and experiments to understand the influence, on the solar cell output parameters, of defects on the front and rear surfaces of the P-type c-Si wafer. Modeling indicates that the defects on the front surface of c-Si reduce the open-circuit voltage and fill factor, while those on the rear surface degrade mainly the short-circuit current density and fill factor, but only when their density exceeds 1012 cm-2.

Original languageEnglish
Pages (from-to)1500-1507
Number of pages8
JournalSolar Energy Materials and Solar Cells
Volume92
Issue number11
DOIs
Publication statusPublished - 1 Nov 2008

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

  1. SDG 7 - Affordable and Clean Energy
    SDG 7 Affordable and Clean Energy

Keywords

  • Defects on crystalline silicon wafer
  • Device modeling
  • Heterojunction with intrinsic thin layers (HIT) solar cells
  • Solar cell output parameters

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