Design of down-sampling processors for radio communications

Adel Ghazel; Lirida Naviner; Khaled Grati

doi:10.1023/A:1024485227426

Design of down-sampling processors for radio communications

Adel Ghazel
, Lirida Naviner
, Khaled Grati

Research output: Contribution to journal › Article › peer-review

Abstract

This paper deals with design and implementation of digital filter processors to be used as down-samplers in wireless transceivers. We consider a homodyne direct conversion and propose an improved method to specify each stage of the cascade structure. The proposed scheme results in a globally compact implementation. The method is detailed for DECT standard and illustrated by a fixed point FPGA based implementation.

Original language	English
Pages (from-to)	31-38
Number of pages	8
Journal	Analog Integrated Circuits and Signal Processing
Volume	36
Issue number	1-2
DOIs	https://doi.org/10.1023/A:1024485227426
Publication status	Published - 1 Jul 2003

Keywords

Multimode digital decimation filtering
Radio communications
Sigma delta conversion
Wireless transceiver

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10.1023/A:1024485227426

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abstract = "This paper deals with design and implementation of digital filter processors to be used as down-samplers in wireless transceivers. We consider a homodyne direct conversion and propose an improved method to specify each stage of the cascade structure. The proposed scheme results in a globally compact implementation. The method is detailed for DECT standard and illustrated by a fixed point FPGA based implementation.",

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AB - This paper deals with design and implementation of digital filter processors to be used as down-samplers in wireless transceivers. We consider a homodyne direct conversion and propose an improved method to specify each stage of the cascade structure. The proposed scheme results in a globally compact implementation. The method is detailed for DECT standard and illustrated by a fixed point FPGA based implementation.

KW - Multimode digital decimation filtering

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KW - Sigma delta conversion

KW - Wireless transceiver

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Design of down-sampling processors for radio communications

Abstract

Keywords

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