TY - GEN
T1 - Design Space Exploration with Deterministic Latency Guarantees for Crossbar MPSoC Architectures
AU - Uscumlic, Bogdan
AU - Enrici, Andrea
AU - Pacalet, Renaud
AU - Gharbi, Amna
AU - Apvrille, Ludovic
AU - Natarianni, Lionel
AU - Roullet, Laurent
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/6/1
Y1 - 2020/6/1
N2 - MPSoC and NoC systems are often used in complex telecommunication systems, which in the 5G era need to enable telecommunication services with unprecedented latency characteristics. Indeed, new services emerge, needing deterministic latency guarantees with virtually no system jitter, during the lifetime of the established telecommunication service. In this work, for the first time, we propose an optimal solution for a design space exploration (DSE) optimization problem, that performs all the traditional DSE tasks, but with end-to-end deterministic latency guarantees. We focus on MPSoC or NoC architectures with crossbars, although this work can be easily extended to more complex architectures. More precisely, our contributions in this work are the following: 1) we propose a novel method for deterministic scheduling in MPSoC and NoC architectures with a crossbar; 2) we propose an optimal solution in the form of an integer linear program (ILP) for DSE problem with end-to-end deterministic latency guarantees; 3) we identify the trade-off between the latency due to the use of crossbar time slots and the application execution time at different processing elements. The numerical results suggest that the proposed deterministic scheduling method can efficiently use all 100 of the crossbar capacity, depending on available application load and system parameters.
AB - MPSoC and NoC systems are often used in complex telecommunication systems, which in the 5G era need to enable telecommunication services with unprecedented latency characteristics. Indeed, new services emerge, needing deterministic latency guarantees with virtually no system jitter, during the lifetime of the established telecommunication service. In this work, for the first time, we propose an optimal solution for a design space exploration (DSE) optimization problem, that performs all the traditional DSE tasks, but with end-to-end deterministic latency guarantees. We focus on MPSoC or NoC architectures with crossbars, although this work can be easily extended to more complex architectures. More precisely, our contributions in this work are the following: 1) we propose a novel method for deterministic scheduling in MPSoC and NoC architectures with a crossbar; 2) we propose an optimal solution in the form of an integer linear program (ILP) for DSE problem with end-to-end deterministic latency guarantees; 3) we identify the trade-off between the latency due to the use of crossbar time slots and the application execution time at different processing elements. The numerical results suggest that the proposed deterministic scheduling method can efficiently use all 100 of the crossbar capacity, depending on available application load and system parameters.
KW - crossbar embedded system architectures.
KW - data communication
KW - design space exploration
KW - linear programming
U2 - 10.1109/ICC40277.2020.9149076
DO - 10.1109/ICC40277.2020.9149076
M3 - Conference contribution
AN - SCOPUS:85089529918
T3 - IEEE International Conference on Communications
BT - 2020 IEEE International Conference on Communications, ICC 2020 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2020 IEEE International Conference on Communications, ICC 2020
Y2 - 7 June 2020 through 11 June 2020
ER -