TY - GEN
T1 - Digital interpolating phase modulator implementation for outphasing PA
AU - Franco, Gabriel Souza
AU - Pham, Dang Kien Germain
AU - Desgreys, Patricia
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/6/1
Y1 - 2020/6/1
N2 - Recent wireless architectures have increased requirements in terms of power consumption and linearity. These requirements concern specially the power amplifier (PA) responsible for driving the antenna. One architecture proposed for this role is the outphasing amplifier, which realizes linear amplification using non-linear components. To generate the waveforms required by the switched-mode outphasing architecture, the Digital Interpolating Phase Modulator (DIPM) was proposed recently. It works by reconstructing a constant amplitude RF signal using several DSP engines. However, the authors only describe an implementation with four signal processing engines by hypothesis. In this paper, an implementation of the DIPM algorithm is developed, alongside an exploration on the number of signal processing engines used. Furthermore, the digital design is synthesized in two different process technologies to contrast power and area utilization. Our simulations confirm their choice of number of engines if power is a constraint. However, other requirements, such as technology used, may lead to different solutions.
AB - Recent wireless architectures have increased requirements in terms of power consumption and linearity. These requirements concern specially the power amplifier (PA) responsible for driving the antenna. One architecture proposed for this role is the outphasing amplifier, which realizes linear amplification using non-linear components. To generate the waveforms required by the switched-mode outphasing architecture, the Digital Interpolating Phase Modulator (DIPM) was proposed recently. It works by reconstructing a constant amplitude RF signal using several DSP engines. However, the authors only describe an implementation with four signal processing engines by hypothesis. In this paper, an implementation of the DIPM algorithm is developed, alongside an exploration on the number of signal processing engines used. Furthermore, the digital design is synthesized in two different process technologies to contrast power and area utilization. Our simulations confirm their choice of number of engines if power is a constraint. However, other requirements, such as technology used, may lead to different solutions.
KW - Digital interpolation
KW - Outphasing
KW - Power amplifiers
U2 - 10.1109/NEWCAS49341.2020.9159834
DO - 10.1109/NEWCAS49341.2020.9159834
M3 - Conference contribution
AN - SCOPUS:85091344848
T3 - NEWCAS 2020 - 18th IEEE International New Circuits and Systems Conference, Proceedings
SP - 259
EP - 262
BT - NEWCAS 2020 - 18th IEEE International New Circuits and Systems Conference, Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 18th IEEE International New Circuits and Systems Conference, NEWCAS 2020
Y2 - 16 June 2020 through 19 June 2020
ER -