Abstract
Turbo codes are presently ubiquitous in the context of mobile wireless communications among other application domains. A decoder for such codes is typically the most power intensive component in the baseband processing chain of a wireless receiver. The iterative nature of these decoders represents a dynamic workload. This brief presents a dynamic power management policy for these decoders. An algorithm is proposed to tune a power manageable decoder according to a prediction of the workload involved within the decoding task. By reclaiming the timing slack left when operating the decoder at a high power mode, the proposed algorithm continuously looks for opportunities to switch to a lower power mode that guarantees the task completion. We apply this technique to an long term evolution Turbo decoder and explore the feasibility of a VLSI implementation on a CMOS technology of 65 nm. Energy savings of up to 54% were achieved with a relatively low loss in error-correction performance.
| Original language | English |
|---|---|
| Article number | 6042349 |
| Pages (from-to) | 2133-2137 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
| Volume | 20 |
| Issue number | 11 |
| DOIs | |
| Publication status | Published - 1 Jan 2012 |
Keywords
- Dynamic power management
- iterative decoding
- low power design
- low-density parity-check (LDPC) codes
- turbo codes