Abstract
The ASIC EICROC is designed to read out the AC-LGAD detectors for the future EIC at Brookhaven National Laboratory (BNL). These detectors should combine excellent temporal (20-30 ps) and spatial (≈20 µm) resolution, enabling a new generation of pixel detectors with precise time measurement. Designing an ASIC to read out the AC-LGAD detectors represents a significant technological challenge. The EICROC ASIC measures and digitizes the charge and the Time-of-Arrival (ToA) with a resolution of 25 ps, transmitting these data to the back-end electronics. The first prototype, EICROC0, was submitted using CMOS 130 nm node in 2022.
| Original language | English |
|---|---|
| Article number | C04014 |
| Journal | Journal of Instrumentation |
| Volume | 20 |
| Issue number | 4 |
| DOIs | |
| Publication status | Published - 1 Apr 2025 |
Keywords
- Analogue electronic circuits
- Digital electronic circuits
- Front-end electronics for detector readout
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