Extracting logical formulae that capture the functionality of systemC designs

Nicolas Vallée, Bruno Monsuez, Vladimir Alexandru Paun

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Object-oriented hardware design languages like SystemC have become very popular to co-design hardware and software systems. Such designs are classically translated into a transition system in order to verify a specification with model-checkers. However, compositionnality and parametricity of SystemC components complicate their translations into finite transition systems. Processing analysis of high-level designs occurs early in the design flow and aims to greatly reduce the correction costs of eventual errors. In this paper, we propose a formal method to statically analyze SystemC designs. Our approach consists in extracting a logical formula representing the behavior of the system in order to avoid combinatorial explosion. This method combines a symbolic execution of SystemC code to infer logical formulae representing its behavior and a generalization phase of these inferred logical properties.

Original languageEnglish
Title of host publicationIMECS 2011 - International MultiConference of Engineers and Computer Scientists 2011
Pages1055-1061
Number of pages7
Publication statusPublished - 26 Jul 2011
Externally publishedYes
EventInternational MultiConference of Engineers and Computer Scientists 2011, IMECS 2011 - Kowloon, Hong Kong
Duration: 16 Mar 201118 Mar 2011

Publication series

NameIMECS 2011 - International MultiConference of Engineers and Computer Scientists 2011
Volume2

Conference

ConferenceInternational MultiConference of Engineers and Computer Scientists 2011, IMECS 2011
Country/TerritoryHong Kong
CityKowloon
Period16/03/1118/03/11

Keywords

  • Abstract interpretation
  • Hypergraphs
  • Symbolic execution
  • SystemC

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