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Fast analysis of combinatorial netlists correctness rate based on binomial law and partitioning

  • Esther Goudet
  • , Luis Peña Trevino
  • , Lirida Naviner
  • , Jean Marc Daveau
  • , Philippe Roche
  • Institut Polytechnique de Paris
  • STMicroelectronics SA, France

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Citations (Scopus)

Abstract

This paper targets fault propagation evaluation in combinational circuits and focuses on netlist-based logic masking prediction. We propose an approach that combines clustering and analytical estimation methods to allow to control the trade-off between accuracy and computation time. The experimental results performed on netlists with large number of gates and complex reconvergent structures show that the proposed solution is better adapted to large combinatorial netlists than the analysis found in the literature.

Original languageEnglish
Title of host publication2023 IEEE 24th Latin American Test Symposium, LATS 2023
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350325973
DOIs
Publication statusPublished - 1 Jan 2023
Event24th IEEE Latin American Test Symposium, LATS 2023 - Veracruz, Mexico
Duration: 21 Mar 202324 Mar 2023

Publication series

Name2023 IEEE 24th Latin American Test Symposium, LATS 2023

Conference

Conference24th IEEE Latin American Test Symposium, LATS 2023
Country/TerritoryMexico
CityVeracruz
Period21/03/2324/03/23

Keywords

  • PTM
  • SPR
  • clustering
  • error probability
  • fault masking

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