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Formale Verifikation des Befehlssatzes eines in SystemC modellierten Mikroprozessors

Translated title of the contribution: Formal verification of the instruction set of a microprocessor modeled in systemC
  • University of Bremen

Research output: Contribution to journalConference articlepeer-review

Translated title of the contributionFormal verification of the instruction set of a microprocessor modeled in systemC
Original languageGerman
Pages (from-to)308-312
Number of pages5
JournalLecture Notes in Informatics (LNI), Proceedings - Series of the Gesellschaft fur Informatik (GI)
VolumeP-67
Publication statusPublished - 1 Jan 2005
Externally publishedYes
Event35th Jahrestagung der Gesellschaft fur Informatik e.V. (GI): Informatik LIVE!, INFORMATIK 2005 - Bonn, Germany
Duration: 19 Sept 200522 Sept 2005

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