FPGA PROTOTYPING OF AN IN-SITU RECONFIGURABLE FILTER BANK FOR AUDIO CODING

Lirida A.De B. Naviner; Jean François Naviner; Marcelo A. De Barros

doi:10.1109/mwscas.2003.1562419

FPGA PROTOTYPING OF AN IN-SITU RECONFIGURABLE FILTER BANK FOR AUDIO CODING

Lirida A.De B. Naviner
, Jean François Naviner
, Marcelo A. De Barros

Centre national de la recherche scientifique
Universidade Federal de Campina Grande

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper presents the FPGA implementation of a processor suitable for adaptive multi-resolution analysis in a audio coding schema. Implementation takes into account all symmetries in the filter response and uses distributed arithmetic approach in order to reduce the device cells account and routing requirements. The prototyped circuit allows dynamic reconfiguration of subbands number and width.

Original language	English
Title of host publication	Midwest Symposium on Circuits and Systems
Editors	Nadder Hamdy
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	847-850
Number of pages	4
ISBN (Electronic)	0780382943
DOIs	https://doi.org/10.1109/mwscas.2003.1562419
Publication status	Published - 1 Jan 2003
Event	46th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2003 - Cairo, Egypt Duration: 27 Dec 2003 → 30 Dec 2003

Publication series

Name	Midwest Symposium on Circuits and Systems
Volume	2
ISSN (Print)	1548-3746

Conference

Conference	46th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2003
Country/Territory	Egypt
City	Cairo
Period	27/12/03 → 30/12/03

Access to Document

10.1109/mwscas.2003.1562419

Cite this

@inproceedings{eddaa3e489ad4be38d3284babe8f1b34,

title = "FPGA PROTOTYPING OF AN IN-SITU RECONFIGURABLE FILTER BANK FOR AUDIO CODING",

abstract = "This paper presents the FPGA implementation of a processor suitable for adaptive multi-resolution analysis in a audio coding schema. Implementation takes into account all symmetries in the filter response and uses distributed arithmetic approach in order to reduce the device cells account and routing requirements. The prototyped circuit allows dynamic reconfiguration of subbands number and width.",

author = "Naviner, \{Lirida A.De B.\} and Naviner, \{Jean Fran{\c c}ois\} and \{De Barros\}, \{Marcelo A.\}",

note = "Publisher Copyright: {\textcopyright} 2004 IEEE.; 46th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2003 ; Conference date: 27-12-2003 Through 30-12-2003",

year = "2003",

month = jan,

day = "1",

doi = "10.1109/mwscas.2003.1562419",

language = "English",

series = "Midwest Symposium on Circuits and Systems",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "847--850",

editor = "Nadder Hamdy",

booktitle = "Midwest Symposium on Circuits and Systems",

}

Naviner, LADB, Naviner, JF & De Barros, MA 2003, FPGA PROTOTYPING OF AN IN-SITU RECONFIGURABLE FILTER BANK FOR AUDIO CODING. in N Hamdy (ed.), Midwest Symposium on Circuits and Systems. Midwest Symposium on Circuits and Systems, vol. 2, Institute of Electrical and Electronics Engineers Inc., pp. 847-850, 46th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2003, Cairo, Egypt, 27/12/03. https://doi.org/10.1109/mwscas.2003.1562419

FPGA PROTOTYPING OF AN IN-SITU RECONFIGURABLE FILTER BANK FOR AUDIO CODING. / Naviner, Lirida A.De B.; Naviner, Jean François; De Barros, Marcelo A.
Midwest Symposium on Circuits and Systems. ed. / Nadder Hamdy. Institute of Electrical and Electronics Engineers Inc., 2003. p. 847-850 (Midwest Symposium on Circuits and Systems; Vol. 2).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T1 - FPGA PROTOTYPING OF AN IN-SITU RECONFIGURABLE FILTER BANK FOR AUDIO CODING

AU - Naviner, Lirida A.De B.

AU - Naviner, Jean François

AU - De Barros, Marcelo A.

PY - 2003/1/1

Y1 - 2003/1/1

N2 - This paper presents the FPGA implementation of a processor suitable for adaptive multi-resolution analysis in a audio coding schema. Implementation takes into account all symmetries in the filter response and uses distributed arithmetic approach in order to reduce the device cells account and routing requirements. The prototyped circuit allows dynamic reconfiguration of subbands number and width.

AB - This paper presents the FPGA implementation of a processor suitable for adaptive multi-resolution analysis in a audio coding schema. Implementation takes into account all symmetries in the filter response and uses distributed arithmetic approach in order to reduce the device cells account and routing requirements. The prototyped circuit allows dynamic reconfiguration of subbands number and width.

U2 - 10.1109/mwscas.2003.1562419

DO - 10.1109/mwscas.2003.1562419

M3 - Conference contribution

AN - SCOPUS:85150457806

T3 - Midwest Symposium on Circuits and Systems

SP - 847

EP - 850

BT - Midwest Symposium on Circuits and Systems

A2 - Hamdy, Nadder

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 46th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2003

Y2 - 27 December 2003 through 30 December 2003

ER -

FPGA PROTOTYPING OF AN IN-SITU RECONFIGURABLE FILTER BANK FOR AUDIO CODING

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