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Functional validation of AADL models via model transformation to SystemC with ATL

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this paper, we put into action an ATL model transformation in order to automatically generate SystemC models from AADL models. The AADL models represent electronic systems to be embedded into FPGAs. Our contribution allows for an early analytical estimation of energetic needs and a rapid SystemC simulation before implementation. The transformation has been tested to simulate an existing video image processing system embedded into a Xilinx Virtex5 FPGA.

Original languageEnglish
Title of host publicationMODELS 2012 Innsbruck - Proceedings of the 5th International Workshop on Model Based Architecting and Construction of Embedded Systems, ACES-MB 2012
Pages13-18
Number of pages6
DOIs
Publication statusPublished - 1 Dec 2012
Externally publishedYes
Event5th International Workshop on Model Based Architecting and Construction of Embedded Systems, ACES-MB 2012 - Innsbruck, Austria
Duration: 30 Sept 201230 Sept 2012

Publication series

NameMODELS 2012 Innsbruck - Proceedings of the 5th International Workshop on Model Based Architecting and Construction of Embedded Systems, ACES-MB 2012

Conference

Conference5th International Workshop on Model Based Architecting and Construction of Embedded Systems, ACES-MB 2012
Country/TerritoryAustria
CityInnsbruck
Period30/09/1230/09/12

Keywords

  • AADL
  • ATL
  • FPGA
  • functional validation
  • MDE
  • program synthesis
  • simulation
  • SystemC

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