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Heterogeneous implementation of a rake receiver for DS-CDMA communication systems

  • D. C. De Souza
  • , I. Krikidis
  • , L. Naviner
  • , J. L. Danger
  • , A. L.A. De Barros
  • , B. G.A. Neto

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This work describes the development of an optimized partitioning algorithm for HW/SW Codesign, which employs more realistic cost measures than previous partitioning algorithms and takes into account FPGA reconfiguration time. This algorithm is then used to find the optimal implementation of a digital RAKE receiver for DS-CDMA on an heterogeneous (hardware/software) platform. We additionally describe a new architectural approach for this type of receiver: in contrast with conventional architectures, which suppose a constant number of demodulation fingers, our new architecture allows a dynamic number of fingers, one for each propagation environment. The introduced flexibility allows this RAKE receiver to have the required computational power for each possible environment. It constitutes the selected application to test our partitioning algorithm.

Original languageEnglish
Title of host publicationProceedings of the IEEE International Conference on Electronics, Circuits, and Systems
DOIs
Publication statusPublished - 1 Dec 2005
Event12th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2005 - Gammarth, Tunisia
Duration: 11 Dec 200514 Dec 2005

Publication series

NameProceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Conference

Conference12th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2005
Country/TerritoryTunisia
CityGammarth
Period11/12/0514/12/05

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