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High density Spin-Transfer Torque (STT)-MRAM based on cross-point architecture

  • Weisheng Zhao
  • , Sumanta Chaudhuri
  • , Celso Accoto
  • , Jacques Olivier Klein
  • , Dafiné Ravelosona
  • , Claude Chappert
  • , Pascale Mazoyer
  • Université Paris-Saclay
  • Centre national de la recherche scientifique
  • STMicroelectronics SA, France

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Spin transfer torque magnetic random access memory (STT-MRAM) is considered as one of the most promising candidates to build up a true universal memory thanks to its fast write/read speed, infinite endurance and non-volatility. However the conventional access architecture based on 1 transistor + 1 memory cell limits its storage density as the selection transistor should be large enough to ensure the write current higher than the critical current for the STT operation. This paper describes a design of cross-point architecture for STT-MRAM. The mean area per word corresponds to only two transistors, which are shared by a number of bits (e.g. 64). This leads to significant improvement of data density (e.g. 1.75 F2/bit). Special techniques are also presented to address the sneak currents and low speed issues of conventional cross-point architecture.

Original languageEnglish
Title of host publication2012 4th IEEE International Memory Workshop, IMW 2012
DOIs
Publication statusPublished - 27 Jul 2012
Event2012 4th IEEE International Memory Workshop, IMW 2012 - Milano, Italy
Duration: 20 May 201223 May 2012

Publication series

Name2012 4th IEEE International Memory Workshop, IMW 2012

Conference

Conference2012 4th IEEE International Memory Workshop, IMW 2012
Country/TerritoryItaly
CityMilano
Period20/05/1223/05/12

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