TY - JOUR
T1 - HKROC
T2 - 20th International Conference on Calorimetry in Particle Physics, CALOR 2024
AU - Dulucq, Frederic
AU - Beauchêne, Antoine
AU - Bolognesi, Sara
AU - Bouyjou, Florent
AU - Carabadjac, Denis
AU - Di Lorenzo, Selma Conforti
AU - Firlej, Miroslaw
AU - Fiutowski, Tomasz
AU - Gastaldi, Franck
AU - Guilloux, Fabrice
AU - Idzik, Marek
AU - de La Taille, Christophe
AU - Moron, Jakub
AU - Nanni, Jerome
AU - Quilain, Benjamin
AU - Rogly, Rudolph
AU - Swientek, Krzysztof
AU - Thienpont, Damien
N1 - Publisher Copyright:
© The Authors, published by EDP Sciences.
PY - 2025/3/7
Y1 - 2025/3/7
N2 - The HKROC ASIC was originally designed to read out the photomultiplier tubes (PMTs) for the Hyper-Kamiokande (HK) experiment. HKROC is a very innovative ASIC capable to read out a large number of channels satisfying stringent requirements in terms of noise, speed and dynamic range. Each HKROC channel features a low-noise preamplifier and shapers, a 10-bit successive approximation Analog-to-Digital Converter (SAR-ADC) for the charge measurement (up to 2500 pC) and a Time-to-Digital Converter (TDC) for the Time-of-Arrival (ToA) measurement with 25 ps binning. HKROC is auto-triggered and includes all necessary ancillary services as bandgap circuit, PLL (Phase-locked loop) and threshold DACs (Digital to Analog Converters). This presentation will describe the ASIC architecture and the experimental results of the last prototype received in January 2022.https://doi.org/10.1051/epjconf/202532000037
AB - The HKROC ASIC was originally designed to read out the photomultiplier tubes (PMTs) for the Hyper-Kamiokande (HK) experiment. HKROC is a very innovative ASIC capable to read out a large number of channels satisfying stringent requirements in terms of noise, speed and dynamic range. Each HKROC channel features a low-noise preamplifier and shapers, a 10-bit successive approximation Analog-to-Digital Converter (SAR-ADC) for the charge measurement (up to 2500 pC) and a Time-to-Digital Converter (TDC) for the Time-of-Arrival (ToA) measurement with 25 ps binning. HKROC is auto-triggered and includes all necessary ancillary services as bandgap circuit, PLL (Phase-locked loop) and threshold DACs (Digital to Analog Converters). This presentation will describe the ASIC architecture and the experimental results of the last prototype received in January 2022.https://doi.org/10.1051/epjconf/202532000037
UR - https://www.scopus.com/pages/publications/105000784994
U2 - 10.1051/epjconf/202532000037
DO - 10.1051/epjconf/202532000037
M3 - Conference article
AN - SCOPUS:105000784994
SN - 2101-6275
VL - 320
JO - EPJ Web of Conferences
JF - EPJ Web of Conferences
M1 - 00037
Y2 - 19 May 2024 through 24 May 2024
ER -