HW/SW co-verification of embedded systems using bounded model checking

Daniel Große, Ulrich Kühne, Rolf Drechsler

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Today, the underlying hardware of embedded systems is often verified successfully. In this context formal verification techniques allow to prove the functional correctness. But in embedded system design the integration of software components becomes more and more important. In this paper we present an integrated approach for formal verification of hardware and software. The approach is demonstrated on a RISC CPU. The verification is based on bounded model checking. Besides correctness proofs of the underlying hardware the hardware/software interface and programs using this interface can be formally verified.

Original languageEnglish
Title of host publicationGLSVLSI'06 - Proceedings of the 2006 ACM Great Lakes Symposium on VLSI
Pages43-48
Number of pages6
Publication statusPublished - 16 Nov 2006
Externally publishedYes
EventGLSVLSI'06 - 2006 ACM Great Lakes Symposium on VLSI - Philadelphia, PA, United States
Duration: 30 Apr 20062 May 2006

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
Volume2006

Conference

ConferenceGLSVLSI'06 - 2006 ACM Great Lakes Symposium on VLSI
Country/TerritoryUnited States
CityPhiladelphia, PA
Period30/04/062/05/06

Keywords

  • Bounded model checking
  • Embedded systems
  • Formal verification
  • Hardware/software co-verification
  • PSL
  • SystemC

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