Implementation of a digital receiver for DS-CDMA communication systems using HW/SW codesign

  • D. C. De Souza
  • , I. Krikidis
  • , L. Naviner
  • , J. L. Danger
  • , M. A. De Barros
  • , B. G.A. Neto

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

An optimized partitioning algorithm for HW/SW Codesign is described and applied to the implementation of a digital RAKE receiver for DS-CDMA on an heterogeneous (hardware/software) platform. The development of this partitioning algorithm aims to gather quality features that have already proved effective when applied separately, but had not been used together yet. The partitioning algorithm is applied to a flexible RAKE architecture able to adapt its number of demodulation fingers to each propagation environment. This RAKE detector uses a serial and iterative computation of the required processing in order to jointly optimize performance and computational power.

Original languageEnglish
Title of host publication2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005
Pages587-590
Number of pages4
DOIs
Publication statusPublished - 1 Dec 2005
Event2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005 - Cincinnati, OH, United States
Duration: 7 Aug 200510 Aug 2005

Publication series

NameMidwest Symposium on Circuits and Systems
Volume2005
ISSN (Print)1548-3746

Conference

Conference2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005
Country/TerritoryUnited States
CityCincinnati, OH
Period7/08/0510/08/05

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