In-plane silicon nanowires for field effect transistor application

Silicon nanowires (SiNW) are important building blocks for a new generation of transistor and sensor applications. Integration and up-scaling of these functionalities rely on a critical ability to position and assemble these nanoscale 1D channels over large areas. We have proposed and demonstrated an in-plane solid-liquid-solid (IPSLS) growth mode of SiNWs, which enables unprecedented morphology control of the in-plane SiNWs and precise deployment of large-scale SiNW arrays. Notably, all the fabrication process can be accomplished in a CMOS compatible all-in-situ plasma deposition environment. We will present here the recent progress in this field and address particularly their related aspects for field effect transistor application.