Level matrix propagation for reliability analysis of nano-scale circuits based on probabilistic transfer matrix

Hicham Ezzat; Lírida Naviner

doi:10.1109/ISQED.2010.5450527

Level matrix propagation for reliability analysis of nano-scale circuits based on probabilistic transfer matrix

Hicham Ezzat
, Lírida Naviner

CNRS LTCI
UFE - Université Française d'Egypte

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Citations (Scopus)

Abstract

As CMOS technology is reaching the nanometer scale, transient and intermittent faults occurrence in logic circuits, which implies a reliability degradation, can no longer be neglected. This paper deals with reliability evaluation which is a critical parameter in circuit design. The proposed method is scalable, iterative and accelerates the reliability analysis.

Original language	English
Title of host publication	Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010
Pages	524-527
Number of pages	4
DOIs	https://doi.org/10.1109/ISQED.2010.5450527
Publication status	Published - 28 May 2010
Externally published	Yes
Event	11th International Symposium on Quality Electronic Design, ISQED 2010 - San Jose, CA, United States Duration: 22 Mar 2010 → 24 Mar 2010

Publication series

Name	Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010

Conference

Conference	11th International Symposium on Quality Electronic Design, ISQED 2010
Country/Territory	United States
City	San Jose, CA
Period	22/03/10 → 24/03/10

Access to Document

10.1109/ISQED.2010.5450527

Cite this

Ezzat, H., & Naviner, L. (2010). Level matrix propagation for reliability analysis of nano-scale circuits based on probabilistic transfer matrix. In Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010 (pp. 524-527). Article 5450527 (Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010). https://doi.org/10.1109/ISQED.2010.5450527

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title = "Level matrix propagation for reliability analysis of nano-scale circuits based on probabilistic transfer matrix",

abstract = "As CMOS technology is reaching the nanometer scale, transient and intermittent faults occurrence in logic circuits, which implies a reliability degradation, can no longer be neglected. This paper deals with reliability evaluation which is a critical parameter in circuit design. The proposed method is scalable, iterative and accelerates the reliability analysis.",

author = "Hicham Ezzat and L{\'i}rida Naviner",

year = "2010",

month = may,

day = "28",

doi = "10.1109/ISQED.2010.5450527",

language = "English",

isbn = "9781424464555",

series = "Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010",

pages = "524--527",

booktitle = "Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010",

note = "11th International Symposium on Quality Electronic Design, ISQED 2010 ; Conference date: 22-03-2010 Through 24-03-2010",

}

Ezzat, H & Naviner, L 2010, Level matrix propagation for reliability analysis of nano-scale circuits based on probabilistic transfer matrix. in Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010., 5450527, Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010, pp. 524-527, 11th International Symposium on Quality Electronic Design, ISQED 2010, San Jose, CA, United States, 22/03/10. https://doi.org/10.1109/ISQED.2010.5450527

Level matrix propagation for reliability analysis of nano-scale circuits based on probabilistic transfer matrix. / Ezzat, Hicham; Naviner, Lírida.
Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010. 2010. p. 524-527 5450527 (Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Level matrix propagation for reliability analysis of nano-scale circuits based on probabilistic transfer matrix

AU - Ezzat, Hicham

AU - Naviner, Lírida

PY - 2010/5/28

Y1 - 2010/5/28

N2 - As CMOS technology is reaching the nanometer scale, transient and intermittent faults occurrence in logic circuits, which implies a reliability degradation, can no longer be neglected. This paper deals with reliability evaluation which is a critical parameter in circuit design. The proposed method is scalable, iterative and accelerates the reliability analysis.

AB - As CMOS technology is reaching the nanometer scale, transient and intermittent faults occurrence in logic circuits, which implies a reliability degradation, can no longer be neglected. This paper deals with reliability evaluation which is a critical parameter in circuit design. The proposed method is scalable, iterative and accelerates the reliability analysis.

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DO - 10.1109/ISQED.2010.5450527

M3 - Conference contribution

AN - SCOPUS:77952622244

SN - 9781424464555

T3 - Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010

SP - 524

EP - 527

BT - Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010

T2 - 11th International Symposium on Quality Electronic Design, ISQED 2010

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Ezzat H, Naviner L. Level matrix propagation for reliability analysis of nano-scale circuits based on probabilistic transfer matrix. In Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010. 2010. p. 524-527. 5450527. (Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010). doi: 10.1109/ISQED.2010.5450527

Level matrix propagation for reliability analysis of nano-scale circuits based on probabilistic transfer matrix

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