Merged digitally controlled oscillator and time to digital converter for TV band ADPLL

  • Wissam Altabban
  • , Patricia Desgreys
  • , Hervé Petit
  • , Karim Ben Kalaia
  • , Laure Rolland Du Roscoat

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this paper we present a merged Digitally Controlled Oscillator DCO and Time To Digital Converter TDC architecture. The DCO is a nine-stage interpolative ring made by NOR cells. It is designed for TV applications and it is implemented in 65nm CMOS process. The oscillator has a large frequency range, from 50MHz to 500MHz, and a 28 x 39μm2 core area. It consumes 1mA from 1.2V power supply, and it has -120dBc/Hz@5MHz phase noise for 420 MHz carrier frequency. The oscillator states are directly used to measure the delay between input and output clocks. The resulting TDC is compact, very economic in power consumption and it has a resolution that is equal to 1/18 of the oscillation period. The DCO and the TDC are used in an All Digital Phase Locked Loop ADPLL.

Original languageEnglish
Title of host publicationISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems
Subtitle of host publicationNano-Bio Circuit Fabrics and Systems
Pages1987-1990
Number of pages4
DOIs
Publication statusPublished - 31 Aug 2010
Externally publishedYes
Event2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010 - Paris, France
Duration: 30 May 20102 Jun 2010

Publication series

NameISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems

Conference

Conference2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010
Country/TerritoryFrance
CityParis
Period30/05/102/06/10

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