MMIC impedance matching system

R. N. De Lima; B. Huyart; E. Bergeault; L. Jallet

doi:10.1049/el:20000955

MMIC impedance matching system

R. N. De Lima
, B. Huyart
, E. Bergeault
, L. Jallet

Centre national de la recherche scientifique
Federal University of Bahia

Research output: Contribution to journal › Article › peer-review

Abstract

An MMIC impedance system incorporating an on-chip load reflection-coefficient measurement system is presented. The system is capable of correcting load mismatches of up to 5:1 better than 2:1 VSWR with an insertion loss between 3.5-5.8 dB. A SiGe power amplifier, with reactive tee input-output matching circuits, was simulated using HP-advanced design system and load-pull technique. The simulation showed that a load mismatch of VSWR 3:1 can produce 10 dB attenuation in output power, relative to the power that would be the power that would be generated if there were no load mismatch.

Original language	English
Pages (from-to)	1393-1394
Number of pages	2
Journal	Electronics Letters
Volume	36
Issue number	16
DOIs	https://doi.org/10.1049/el:20000955
Publication status	Published - 3 Aug 2000

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abstract = "An MMIC impedance system incorporating an on-chip load reflection-coefficient measurement system is presented. The system is capable of correcting load mismatches of up to 5:1 better than 2:1 VSWR with an insertion loss between 3.5-5.8 dB. A SiGe power amplifier, with reactive tee input-output matching circuits, was simulated using HP-advanced design system and load-pull technique. The simulation showed that a load mismatch of VSWR 3:1 can produce 10 dB attenuation in output power, relative to the power that would be the power that would be generated if there were no load mismatch.",

author = "\{De Lima\}, \{R. N.\} and B. Huyart and E. Bergeault and L. Jallet",

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N2 - An MMIC impedance system incorporating an on-chip load reflection-coefficient measurement system is presented. The system is capable of correcting load mismatches of up to 5:1 better than 2:1 VSWR with an insertion loss between 3.5-5.8 dB. A SiGe power amplifier, with reactive tee input-output matching circuits, was simulated using HP-advanced design system and load-pull technique. The simulation showed that a load mismatch of VSWR 3:1 can produce 10 dB attenuation in output power, relative to the power that would be the power that would be generated if there were no load mismatch.

AB - An MMIC impedance system incorporating an on-chip load reflection-coefficient measurement system is presented. The system is capable of correcting load mismatches of up to 5:1 better than 2:1 VSWR with an insertion loss between 3.5-5.8 dB. A SiGe power amplifier, with reactive tee input-output matching circuits, was simulated using HP-advanced design system and load-pull technique. The simulation showed that a load mismatch of VSWR 3:1 can produce 10 dB attenuation in output power, relative to the power that would be the power that would be generated if there were no load mismatch.

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DO - 10.1049/el:20000955

M3 - Article

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JO - Electronics Letters

JF - Electronics Letters

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MMIC impedance matching system

Abstract

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