New structure of algorithmic DAC in switched current technique

P. Riffaud-Desgreys; E. Garnier; Ph Roux; Ph Marchegay

doi:10.1049/cp:19990476

New structure of algorithmic DAC in switched current technique

P. Riffaud-Desgreys
, E. Garnier
, Ph Roux
, Ph Marchegay

Centre national de la recherche scientifique

Research output: Contribution to journal › Conference article › peer-review

Abstract

An architecture of algorithmic digital to analogue converter that combines the advantages of the switched current technique and of the algorithmic design is presented. The converter is fully compatible with digital VLSI CMOS technology, occupies little silicon area and dissipates low power.

Original language	English
Pages (from-to)	111-114
Number of pages	4
Journal	IEE Conference Publication
Issue number	466
DOIs	https://doi.org/10.1049/cp:19990476
Publication status	Published - 1 Jan 1999
Event	Proceedings of the 1999 3rd International Conference on Advanced A/D and D/A Conversionn Techniques and Their Applications - Glasgow, UK Duration: 27 Jul 1999 → 28 Jul 1999

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10.1049/cp:19990476

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@article{4af7ddb79c0846288aac4ea08403864a,

title = "New structure of algorithmic DAC in switched current technique",

abstract = "An architecture of algorithmic digital to analogue converter that combines the advantages of the switched current technique and of the algorithmic design is presented. The converter is fully compatible with digital VLSI CMOS technology, occupies little silicon area and dissipates low power.",

author = "P. Riffaud-Desgreys and E. Garnier and Ph Roux and Ph Marchegay",

year = "1999",

month = jan,

day = "1",

doi = "10.1049/cp:19990476",

language = "English",

pages = "111--114",

journal = "IEE Conference Publication",

issn = "0537-9989",

number = "466",

note = "Proceedings of the 1999 3rd International Conference on Advanced A/D and D/A Conversionn Techniques and Their Applications ; Conference date: 27-07-1999 Through 28-07-1999",

}

TY - JOUR

T1 - New structure of algorithmic DAC in switched current technique

AU - Riffaud-Desgreys, P.

AU - Garnier, E.

AU - Roux, Ph

AU - Marchegay, Ph

PY - 1999/1/1

Y1 - 1999/1/1

N2 - An architecture of algorithmic digital to analogue converter that combines the advantages of the switched current technique and of the algorithmic design is presented. The converter is fully compatible with digital VLSI CMOS technology, occupies little silicon area and dissipates low power.

AB - An architecture of algorithmic digital to analogue converter that combines the advantages of the switched current technique and of the algorithmic design is presented. The converter is fully compatible with digital VLSI CMOS technology, occupies little silicon area and dissipates low power.

U2 - 10.1049/cp:19990476

DO - 10.1049/cp:19990476

M3 - Conference article

AN - SCOPUS:0033340996

SN - 0537-9989

SP - 111

EP - 114

JO - IEE Conference Publication

JF - IEE Conference Publication

IS - 466

T2 - Proceedings of the 1999 3rd International Conference on Advanced A/D and D/A Conversionn Techniques and Their Applications

Y2 - 27 July 1999 through 28 July 1999

ER -

New structure of algorithmic DAC in switched current technique

Abstract

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