Abstract
This paper deals with customized implementation of decimation processors. Important aspects of design lav decisions are considered under hardware impact point of view. Several implementation approaches and respective evaluations in terms of time and basic operators requirements are given as well as a summary of the steps involved in an ad hoc implementation.
| Original language | English |
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| Pages | 304-309 |
| Number of pages | 6 |
| Publication status | Published - 1 Dec 2004 |
| Externally published | Yes |
| Event | 2004 IEEE International Conference on Industrial Technology, ICIT - Hammamet, Tunisia Duration: 8 Dec 2004 → 10 Dec 2004 |
Conference
| Conference | 2004 IEEE International Conference on Industrial Technology, ICIT |
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| Country/Territory | Tunisia |
| City | Hammamet |
| Period | 8/12/04 → 10/12/04 |
Keywords
- Decimation alter
- Dedicated processors
- Digital alterarchitecture
- Hardware implementation