@inproceedings{8f74a57f47164d3785dfd15bcd5899e4,
title = "Optimizing the number of channels for time-interleaved sample-and-hold circuits",
abstract = "A technique for optimizing the number of channels for time-interleaved sample-and-hold Is proposed. This technique permits to extract the figure of merit of a single sample-and-hold circuit while taking into account the limited gainbandwidth of a family of operational amplifiers sharing the same topology. A double-sampled architecture of sample-and-holds is used to reduce die area and power consumption. The extracted results allow us to determine the optimal operation frequency and consequently the optimal number of channels for a given sampling frequency required by the time-interleaved sample-andhold. A demonstration is shown for a gain boosted folded cascode operational amplifier topology in a 65 nm technology.",
author = "Chadi Jabbour and David Camarero and \{Van Nguyen\}, Tam and Patrick Loumeau",
year = "2008",
month = sep,
day = "30",
doi = "10.1109/NEWCAS.2008.4606367",
language = "English",
isbn = "9781424423323",
series = "2008 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference, NEWCAS-TAISA",
pages = "245--248",
booktitle = "2008 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference, NEWCAS-TAISA",
note = "2008 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference, NEWCAS-TAISA ; Conference date: 22-06-2008 Through 25-06-2008",
}