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Petiroc and Citiroc: Front-end ASICs for SiPM read-out and ToF applications

  • J. Fleury
  • , S. Callier
  • , C. De La Taille
  • , N. Seguin
  • , D. Thienpont
  • , F. Dulucq
  • , S. Ahmad
  • , G. Martin
  • Weeroc SAS
  • Université Paris-Sud

Research output: Contribution to journalArticlepeer-review

71 Citations (Scopus)

Abstract

Petiroc and Citiroc are the two latest ASIC from Weeroc dedicated to SiPM read-out. Petiroc is a 16-channel front-end ASIC designed to readout silicon photomultipliers (SiPMs) for particle time-of-flight measurement applications. It combines a very fast and low-jitter trigger with an accurate charge measurement. Citiroc is a 32-channel front-end ASIC designed to readout silicon photo-multipliers (SiPM). It allows triggering down to 1/3 pe and provides the charge measurement with a good noise rejection. Moreover, Citiroc outputs the 32-channel triggers with a high accuracy (100 ps). Each channel of both ASICs combines a trigger path with an accurate charge measurement path. An adjustment of the SiPM high voltage is possible using a channel-by-channel input DAC. That allows a fine SiPM gain and dark noise adjustment at the system level to correct for the nonuniformity of SiPMs. Timing measurement down to 16 ps RMS jitter for Petiroc and 100 ps RMS for Citiroc is possible along with 1% linearity energy measurement up to 2500 pe. The power consumption is around 3.5 mW/channel for Petiroc and 3 mW/channel for Citiroc, excluding ASICs outing buffer.

Original languageEnglish
Article numberC01049
JournalJournal of Instrumentation
Volume9
Issue number1
DOIs
Publication statusPublished - 1 Jan 2014
Externally publishedYes

Keywords

  • Analogue electronic circuits
  • Front-end electronics for detector readout
  • VLSI circuits

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