Physical and electrical properties of scaled gate stacks on Si/passivated In0.53Ga0.47As

C. Marchiori; M. El Kazzi; L. Czornomaz; D. Pierucci; M. Silly; F. Sirotti; S. Abel; E. Uccelli; M. Sousa; J. Fompeyrine

doi:10.1149/05807.0369ecst

Physical and electrical properties of scaled gate stacks on Si/passivated In_0.53Ga_0.47As

C. Marchiori, M. El Kazzi, L. Czornomaz, D. Pierucci, M. Silly, F. Sirotti, S. Abel, E. Uccelli, M. Sousa, J. Fompeyrine

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

In_0.53Ga_0.47As based capacitors and self-aligned transistors fabricated with HfO₂/Al₂O₃/Si gate stacks in a gate-first process flow show promising electrical properties. With in-situ and ex-situ characterization methods, we review systematically the physical and chemical properties of the whole multilayered stack. Especially, critical instabilities which may potentially limit the achievement of sub-nanometer capacitance equivalent thickness and a low interface state density are described in detail. Finally we propose some alternative solutions to avoid the observed instability paths.

Original language	English
Title of host publication	ECS Transactions
Publisher	Electrochemical Society Inc.
Pages	369-378
Number of pages	10
Edition	7
ISBN (Electronic)	9781607684527
DOIs	https://doi.org/10.1149/05807.0369ecst
Publication status	Published - 1 Jan 2013
Externally published	Yes

Publication series

Name	ECS Transactions
Number	7
Volume	58
ISSN (Print)	1938-5862
ISSN (Electronic)	1938-6737

Access to Document

10.1149/05807.0369ecst

Cite this

Marchiori, C., El Kazzi, M., Czornomaz, L., Pierucci, D., Silly, M., Sirotti, F., Abel, S., Uccelli, E., Sousa, M., & Fompeyrine, J. (2013). Physical and electrical properties of scaled gate stacks on Si/passivated In_0.53Ga_0.47As. In ECS Transactions (7 ed., pp. 369-378). (ECS Transactions; Vol. 58, No. 7). Electrochemical Society Inc.. https://doi.org/10.1149/05807.0369ecst

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title = "Physical and electrical properties of scaled gate stacks on Si/passivated In0.53Ga0.47As",

abstract = "In0.53Ga0.47As based capacitors and self-aligned transistors fabricated with HfO2/Al2O3/Si gate stacks in a gate-first process flow show promising electrical properties. With in-situ and ex-situ characterization methods, we review systematically the physical and chemical properties of the whole multilayered stack. Especially, critical instabilities which may potentially limit the achievement of sub-nanometer capacitance equivalent thickness and a low interface state density are described in detail. Finally we propose some alternative solutions to avoid the observed instability paths.",

author = "C. Marchiori and \{El Kazzi\}, M. and L. Czornomaz and D. Pierucci and M. Silly and F. Sirotti and S. Abel and E. Uccelli and M. Sousa and J. Fompeyrine",

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language = "English",

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AU - Marchiori, C.

AU - El Kazzi, M.

AU - Czornomaz, L.

AU - Pierucci, D.

AU - Silly, M.

AU - Sirotti, F.

AU - Abel, S.

AU - Uccelli, E.

AU - Sousa, M.

AU - Fompeyrine, J.

PY - 2013/1/1

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N2 - In0.53Ga0.47As based capacitors and self-aligned transistors fabricated with HfO2/Al2O3/Si gate stacks in a gate-first process flow show promising electrical properties. With in-situ and ex-situ characterization methods, we review systematically the physical and chemical properties of the whole multilayered stack. Especially, critical instabilities which may potentially limit the achievement of sub-nanometer capacitance equivalent thickness and a low interface state density are described in detail. Finally we propose some alternative solutions to avoid the observed instability paths.

AB - In0.53Ga0.47As based capacitors and self-aligned transistors fabricated with HfO2/Al2O3/Si gate stacks in a gate-first process flow show promising electrical properties. With in-situ and ex-situ characterization methods, we review systematically the physical and chemical properties of the whole multilayered stack. Especially, critical instabilities which may potentially limit the achievement of sub-nanometer capacitance equivalent thickness and a low interface state density are described in detail. Finally we propose some alternative solutions to avoid the observed instability paths.

U2 - 10.1149/05807.0369ecst

DO - 10.1149/05807.0369ecst

M3 - Conference contribution

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BT - ECS Transactions

PB - Electrochemical Society Inc.