TY - GEN
T1 - Progress-space tradeoffs in single-writer memory implementations
AU - Imbs, Damien
AU - Kuznetsov, Petr
AU - Rieutord, Thibault
N1 - Publisher Copyright:
© 2017 Damien Imbs, Petr Kuznetsov, and Thibault Rieutord.
PY - 2018/3/1
Y1 - 2018/3/1
N2 - Many algorithms designed for shared-memory distributed systems assume the single-writer multireader (SWMR) setting where each process is provided with a unique register that can only be written by the process and read by all. In a system where computation is performed by a bounded number n of processes coming from a large (possibly unbounded) set of potential participants, the assumption of an SWMR memory is no longer reasonable. If only a bounded number of multiwriter multi-reader (MWMR) registers are provided, we cannot rely on an a priori assignment of processes to registers. In this setting, implementing an SWMR memory, or equivalently, ensuring stable writes (i.e., every written value persists in the memory), is desirable. In this paper, we propose an SWMR implementation that adapts the number of MWMR registers used to the desired progress condition. For any given k from 1 to n, we present an algorithm that uses n+k-1 registers to implement a k-lock-free SWMR memory. In the special case of 2-lock-freedom, we also give a matching lower bound of n + 1 registers, which supports our conjecture that the algorithm is space-optimal. Our lower bound holds for the strictly weaker progress condition of 2-obstruction-freedom, which suggests that the space complexity for k-obstruction-free and k-lock-free SWMR implementations might coincide.
AB - Many algorithms designed for shared-memory distributed systems assume the single-writer multireader (SWMR) setting where each process is provided with a unique register that can only be written by the process and read by all. In a system where computation is performed by a bounded number n of processes coming from a large (possibly unbounded) set of potential participants, the assumption of an SWMR memory is no longer reasonable. If only a bounded number of multiwriter multi-reader (MWMR) registers are provided, we cannot rely on an a priori assignment of processes to registers. In this setting, implementing an SWMR memory, or equivalently, ensuring stable writes (i.e., every written value persists in the memory), is desirable. In this paper, we propose an SWMR implementation that adapts the number of MWMR registers used to the desired progress condition. For any given k from 1 to n, we present an algorithm that uses n+k-1 registers to implement a k-lock-free SWMR memory. In the special case of 2-lock-freedom, we also give a matching lower bound of n + 1 registers, which supports our conjecture that the algorithm is space-optimal. Our lower bound holds for the strictly weaker progress condition of 2-obstruction-freedom, which suggests that the space complexity for k-obstruction-free and k-lock-free SWMR implementations might coincide.
KW - Comparison-based algorithms
KW - Progress conditions
KW - Single-writer memory implementation
KW - Space complexity
U2 - 10.4230/LIPIcs.OPODIS.2017.9
DO - 10.4230/LIPIcs.OPODIS.2017.9
M3 - Conference contribution
AN - SCOPUS:85045647257
T3 - Leibniz International Proceedings in Informatics, LIPIcs
BT - 21st International Conference on Principles of Distributed Systems, OPODIS 2017
A2 - Aspnes, James
A2 - Leitao, Joao
A2 - Bessani, Alysson
A2 - Felber, Pascal
PB - Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing
T2 - 21st International Conference on Principles of Distributed Systems, OPODIS 2017
Y2 - 18 December 2017 through 20 December 2017
ER -