Pseudorandom direct sampler for non-uniform sub sampling architecture in a multistandard receiver

In this paper, a Non-Uniform Sampling (NUS) technique for down-conversion stage in a multistandard radio receiver is proposed. For both narrowband and wideband standard processing, NUS promises relaxing system design constraints, decreasing the sampling frequency as well as reducing power consumption. A non-uniform clock generator, called Pseudorandom Direct Sampler (PDS), is described. PDS is used to non-uniformly control the Analog-to-Digital Converter (ADC) performing IF sub-sampling in proposed GSM/UMTS/WiFi multistandard receiver architecture. PDS architecture is based on using modified Direct Digital Synthesizer (DDS) including pseudorandom behavior. A 90- nm CMOS FPGA based prototype of PDS reveals an internal clocking up to 350 MHz and a power consumption lower than 4 mW.