Safe-Error Analysis of Post-Quantum Cryptography Mechanisms – Short Paper –

  • Luk Bettale
  • , Simon Montoya
  • , Guénaël Renault

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

The NIST selection process for standardizing Post-Quantum Cryptography Mechanisms is currently running. Many papers already studied their theoretical security, but the resistance in deployed device has not been much investigated so far. In particular, fault attack is a serious threat for algorithms implemented in embedded devices. One particularly powerful technique is to use safe-error attacks. Such attacks exploit the fact that a specific fault may or may not lead to a faulty output depending on a secret value. In this paper, we investigate the resistance of various Post-Quantum candidates algorithms against such attacks.

Original languageEnglish
Title of host publicationProceedings - 2021 Workshop on Fault Detection and Tolerance in Cryptography, FDTC 2021
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages39-44
Number of pages6
ISBN (Electronic)9781665436731
DOIs
Publication statusPublished - 1 Jan 2021
Externally publishedYes
Event18th Workshop on Fault Detection and Tolerance in Cryptography, FDTC 2021 - Virtual, Online, Italy
Duration: 17 Sept 2021 → …

Publication series

NameProceedings - 2021 Workshop on Fault Detection and Tolerance in Cryptography, FDTC 2021

Conference

Conference18th Workshop on Fault Detection and Tolerance in Cryptography, FDTC 2021
Country/TerritoryItaly
CityVirtual, Online
Period17/09/21 → …

Keywords

  • Fault attacks
  • Post-quantum cryptography
  • Safe-error

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