SecBus: Operating system controlled hierarchical page-based memory bus protection

  • Su Lifeng
  • , Stephan Courcambeck
  • , Pierre Guillemin
  • , Christian Schwarz
  • , Renaud Pacalet

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper presents a new two-levels page-based memory bus protection scheme. A trusted Operating System drives a hardware cryptographic unit and manages security contexts for each protected memory page. The hardware unit is located between the internal system bus and the memory controller. It protects the integrity and confidentiality of selected memory pages. For better acceptability the processor (CPU) architecture and the software application level are unmodified. The impact of the security on cost and performance is optimized by several algorithmic and hardware techniques and by a differentiated handling of memory pages, depending on their characteristics.

Original languageEnglish
Title of host publicationProceedings - 2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09
Pages570-573
Number of pages4
Publication statusPublished - 22 Oct 2009
Externally publishedYes
Event2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09 - Nice, France
Duration: 20 Apr 200924 Apr 2009

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
ISSN (Print)1530-1591

Conference

Conference2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09
Country/TerritoryFrance
CityNice
Period20/04/0924/04/09

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