Security modeling for embedded system design

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Among the many recent cyber attacks, the Mirai botnet DDOS attacks were carried out using infected IoTs. To prevent our connected devices from being thus compromised, their security vulnerabilities should be detected and mitigated early. This paper presents how the SysML-Sec Methodology has been enhanced for the evolving graphical modeling of security through the three stages of our embedded system design methodology: Analysis, HW/SW Partitioning, and Software Analysis. The security requirements and attack graphs generated during the Analysis phase determine the sensitive data and attacker model during the HW/SW Partitioning phase. We then accordingly generate a secured model with communication protection modeled using abstract security representations, which can then be translated into a Software/System Design Model. The Software Model is intended as the final detailed model of the system. Throughout the design process, formal verification and simulation evaluate safety, security, and performance of the system.

Original languageEnglish
Title of host publicationGraphical Models for Security - 4th International Workshop, GraMSec 2017, Revised Selected Papers
EditorsSjouke Mauw, Peng Liu, Ketil Stolen
PublisherSpringer Verlag
Pages99-106
Number of pages8
ISBN (Print)9783319748597
DOIs
Publication statusPublished - 1 Jan 2018
Externally publishedYes
Event4th International Workshop on Graphical Models for Security, GraMSec 2017 - [state] CA, United States
Duration: 21 Aug 201721 Aug 2017

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume10744 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference4th International Workshop on Graphical Models for Security, GraMSec 2017
Country/TerritoryUnited States
City[state] CA
Period21/08/1721/08/17

Keywords

  • Embedded systems
  • Formal verification
  • ProVerif

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