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Simulation study of aging in CMOS binary adders

  • Institut Mines-Télécom

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Hot carrier injection (HCI) and negative bias temperature instability (NBTI) become dominant reliability issues in nanometer CMOS technology. These aging effects can induce additional delay which will be accumulated through logic gates and thus degrade the performance of the circuits. This paper discusses performance degradations induced by aging mechanisms in digital integrated circuits. We propose an aging-aware synthesis flow taking into account NBTI and HCI. This flow is demonstrated through the implementation of several architectures of adders using CMOS technology. The simulation results show that Kogge-Stone Adder (KSA) and SKlansky Adder (SKA) are the best solutions whether in terms of the complexity or the resistance to aging effects with induced delay degradation below 0.35%.

Original languageEnglish
Title of host publication2014 37th International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO 2014 - Proceedings
PublisherIEEE Computer Society
Pages51-55
Number of pages5
ISBN (Print)9789532330816
DOIs
Publication statusPublished - 1 Jan 2014
Externally publishedYes
Event2014 37th International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO 2014 - Opatija, Croatia
Duration: 26 May 201430 May 2014

Publication series

Name2014 37th International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO 2014 - Proceedings

Conference

Conference2014 37th International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO 2014
Country/TerritoryCroatia
CityOpatija
Period26/05/1430/05/14

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