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SKIROC2-CMS an ASIC for testing CMS HGCAL

  • J. Borg
  • , S. Callier
  • , D. Coko
  • , F. Dulucq
  • , C. De La Taille
  • , L. Raux
  • , T. Sculac
  • , D. Thienpont
  • Imperial College London
  • Faculty of Electrical Engineering, Mechanical Engineering and Naval Architecture, University of Split

Research output: Contribution to journal › Article › peer-review

23 Citations (Scopus)

Abstract

SKIROC2-CMS is a chip derived from CALICE SKIROC2 that provides 64 channels of low noise charge preamplifiers optimized for 50 pF pin diodes and 10 pC dynamic range. They are followed by high gain and low gain 25 ns shapers, a 13-deep 40 MHz analog memory used as a waveform sampler at 40 MHz. and 12-bit ADCs. A fast shaper followed by discriminator and TDC provide timing information to an accuracy of 50 ps, in order to test TOT and TOA techniques at system level and in test-beam. The chip was sent to fabrication in January 2016 in AMS SiGe 0,35 μm and was received in May. It was tested in the lab during the summer and will be mounted on sensors for beam-tests in the fall.

Original languageEnglish
Article numberC02019
JournalJournal of Instrumentation
Volume12
Issue number2
DOIs
Publication statusPublished - 7 Feb 2017

Keywords

  • Front-end electronics for detector readout
  • Timing detectors
  • VLSI circuits

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