TY - GEN
T1 - Study of the Readout of AC-LGAD Sensor and ALTIROC Chip Assemblies
AU - D'Amen, G.
AU - De La Taille, C.
AU - Giacomini, G.
AU - Marchand, D.
AU - Morenas, M.
AU - Camacho, C. Munoz
AU - Rossi, E.
AU - Seguin-Moreau, N.
AU - Serin, L.
AU - Tricoli, A.
AU - Wang, P. K.
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022/1/1
Y1 - 2022/1/1
N2 - The development of detectors that provide high resolution in four dimensions has attracted wide-spread interest in the scientific community for a wide variety of applications. This can be achieved by leveraging new sensor designs, such as the AC-coupled Low Gain Avalanche Diode (AC-LGAD). This type of silicon detector has already shown excellent timing performances while also providing high spatial resolution and is therefore considered a promising candidate for future detectors to provide 4-dimensional measurements of particle interactions. While previous works detailed the possibility to readout these sensors using chips designed for standard (DC-)LGAD sensors, here we focus on the study of the operational specification of a complete AC-LGAD based detector. Fundamental readout parameters such as the minimum charge sensitivity, noise level, and signal jitter have been evaluated for AC-LGAD sensors designed and fabricated at the Brookhaven National Laboratory (USA). These sensors have been coupled to a fast-time ASIC, the ATLAS LGAD Timing Integrated Read-Out Chip (ALTIROC), developed by Omega/IJCLab (France) for the ATLAS timing detector at the HL-LHC. The studies shown are used as a basis for the creation and optimization of a dedicated AC-LGAD readout ASIC.
AB - The development of detectors that provide high resolution in four dimensions has attracted wide-spread interest in the scientific community for a wide variety of applications. This can be achieved by leveraging new sensor designs, such as the AC-coupled Low Gain Avalanche Diode (AC-LGAD). This type of silicon detector has already shown excellent timing performances while also providing high spatial resolution and is therefore considered a promising candidate for future detectors to provide 4-dimensional measurements of particle interactions. While previous works detailed the possibility to readout these sensors using chips designed for standard (DC-)LGAD sensors, here we focus on the study of the operational specification of a complete AC-LGAD based detector. Fundamental readout parameters such as the minimum charge sensitivity, noise level, and signal jitter have been evaluated for AC-LGAD sensors designed and fabricated at the Brookhaven National Laboratory (USA). These sensors have been coupled to a fast-time ASIC, the ATLAS LGAD Timing Integrated Read-Out Chip (ALTIROC), developed by Omega/IJCLab (France) for the ATLAS timing detector at the HL-LHC. The studies shown are used as a basis for the creation and optimization of a dedicated AC-LGAD readout ASIC.
UR - https://www.scopus.com/pages/publications/85185389537
U2 - 10.1109/NSS/MIC44845.2022.10398963
DO - 10.1109/NSS/MIC44845.2022.10398963
M3 - Conference contribution
AN - SCOPUS:85185389537
T3 - 2022 IEEE NSS/MIC RTSD - IEEE Nuclear Science Symposium, Medical Imaging Conference and Room Temperature Semiconductor Detector Conference
BT - 2022 IEEE NSS/MIC RTSD - IEEE Nuclear Science Symposium, Medical Imaging Conference and Room Temperature Semiconductor Detector Conference
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2022 IEEE Nuclear Science Symposium, Medical Imaging Conference, and Room Temperature Semiconductor Detector Conference, IEEE NSS MIC RTSD 2022
Y2 - 5 November 2022 through 12 November 2022
ER -