SystemC space exploration of behavioral synthesis options on area, performance and power consumption

S. Chtourou, O. Hammami

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

SystemC based design of system on chip is gaining popularity and designers are increasingly faced with the need to synthesize at the highest level of abstraction. Although RTL level SystemC design synthesis is common behavioral level SystemC design synthesis is still not widely accepted. The objective of this paper is to present methodology for behavioral synthesis of SystemC design. It gives the possibility to detect the best synthesis results on area, performance and power consumption estimation through an automatic exploration of synthesis results. This framework allows SystemC level design space exploration of SoC.

Original languageEnglish
Title of host publicationProceedings 17th 2005 International Conference on Microelectronics, ICM 2005
Pages67-71
Number of pages5
DOIs
Publication statusPublished - 1 Dec 2005
Event17th 2005 International Conference on Microelectronics, ICM 2005 - Islamabad, Pakistan
Duration: 13 Dec 200515 Dec 2005

Publication series

NameProceedings of the International Conference on Microelectronics, ICM
Volume2005

Conference

Conference17th 2005 International Conference on Microelectronics, ICM 2005
Country/TerritoryPakistan
CityIslamabad
Period13/12/0515/12/05

Keywords

  • Behavioral synthesis
  • Design space exploration
  • SystemC compiler

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