Threshold voltage shift under electrical stress in amorphous, polymorphous, and microcrystalline silicon bottom gate thin-film transistors

The crucial influence of the interface between the gate dielectric and intrinsic layer has been studied in detail for amorphous silicon, polymorphous silicon and microcrystalline silicon bottom gate thin-film transistors. We show that the electrical parameters of the TFTs depend directly on the quality of this interface, which can be strongly degraded by a vacuum break.A hydrogen plasma pretreatment of this interface greatly improves the electrical characteristics of polymorphous silicon TFTs, the mobility increases from 0.4 to 0.75 cm ²/V s while their subthreshold slope decreases from 1 to 0.7 V/dec. Moreover, we show that these improvements also translate into more stable TFT characteristics. Finally, microcrystalline silicon TFTs show the best stability and a nitrogen-plasma treatment of the dielectric improves their stability.