Verifying fence elimination optimisations

Viktor Vafeiadis, Francesco Zappa Nardelli

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

We consider simple compiler optimisations for removing redundant memory fences in programs running on top of the x86-TSO relaxed memory model. While the optimisations are performed using standard thread-local control flow analyses, their correctness is subtle and relies on a non-standard global simulation argument. The implementation and the proof of correctness are programmed in Coq as part of CompCertTSO, a fully-fledged certified compiler from a concurrent extension of a C-like language to x86 assembler. In this article, we describe the soundness proof of the optimisations and evaluate their effectiveness.

Original languageEnglish
Title of host publicationStatic Analysis - 18th International Symposium, SAS 2011, Proceedings
Pages146-162
Number of pages17
DOIs
Publication statusPublished - 28 Sept 2011
Event18th International Static Analysis Symposium, SAS 2011 - Venice, Italy
Duration: 14 Sept 201016 Sept 2010

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume6887 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference18th International Static Analysis Symposium, SAS 2011
Country/TerritoryItaly
CityVenice
Period14/09/1016/09/10

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