VLSI architectures for real-time moving image resampling

Lirida Alves de Barros Naviner

VLSI architectures for real-time moving image resampling

Federal University of Paraíba

Research output: Contribution to conference › Paper › peer-review

Abstract

This paper presents a solution for real-time image resampling, using dedicated VLSI architectures. Our spatial image resampling algorithm is based on the use of two levels for the interpolation and relies on a tradeoff between storage and calculation of the filter coefficients, improving the performance-cost tradeoff of the hardware. Efficient motion compensated temporal resampling is carried out with a high performance motion estimation algorithm. Multiprediction, multiresolution and hierarchical approaches lead to an overall reduced computation power compared to classical block-matching algorithms.

Original language	English
Pages	1260-1263
Number of pages	4
Publication status	Published - 1 Dec 1995
Externally published	Yes
Event	Proceedings of the 1995 IEEE 38th Midwest Symposium on Circuits and Systems. Part 1 (of 2) - Rio de Janeiro, Braz Duration: 13 Aug 1995 → 16 Aug 1995

Conference

Conference	Proceedings of the 1995 IEEE 38th Midwest Symposium on Circuits and Systems. Part 1 (of 2)
City	Rio de Janeiro, Braz
Period	13/08/95 → 16/08/95

Cite this

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title = "VLSI architectures for real-time moving image resampling",

abstract = "This paper presents a solution for real-time image resampling, using dedicated VLSI architectures. Our spatial image resampling algorithm is based on the use of two levels for the interpolation and relies on a tradeoff between storage and calculation of the filter coefficients, improving the performance-cost tradeoff of the hardware. Efficient motion compensated temporal resampling is carried out with a high performance motion estimation algorithm. Multiprediction, multiresolution and hierarchical approaches lead to an overall reduced computation power compared to classical block-matching algorithms.",

author = "Naviner, \{Lirida Alves de Barros\}",

year = "1995",

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day = "1",

language = "English",

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PY - 1995/12/1

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N2 - This paper presents a solution for real-time image resampling, using dedicated VLSI architectures. Our spatial image resampling algorithm is based on the use of two levels for the interpolation and relies on a tradeoff between storage and calculation of the filter coefficients, improving the performance-cost tradeoff of the hardware. Efficient motion compensated temporal resampling is carried out with a high performance motion estimation algorithm. Multiprediction, multiresolution and hierarchical approaches lead to an overall reduced computation power compared to classical block-matching algorithms.

AB - This paper presents a solution for real-time image resampling, using dedicated VLSI architectures. Our spatial image resampling algorithm is based on the use of two levels for the interpolation and relies on a tradeoff between storage and calculation of the filter coefficients, improving the performance-cost tradeoff of the hardware. Efficient motion compensated temporal resampling is carried out with a high performance motion estimation algorithm. Multiprediction, multiresolution and hierarchical approaches lead to an overall reduced computation power compared to classical block-matching algorithms.

M3 - Paper

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T2 - Proceedings of the 1995 IEEE 38th Midwest Symposium on Circuits and Systems. Part 1 (of 2)

Y2 - 13 August 1995 through 16 August 1995

ER -

VLSI architectures for real-time moving image resampling

Abstract

Conference

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Cite this