Passer à la navigation principale Passer à la recherche Passer au contenu principal

Analysis of preemption costs for the stack cache

  • ENSTA ParisTech
  • Technical University of Denmark
  • Université Paris-Saclay
  • Institut Pierre Simon Laplace, CNRS and CEA

Résultats de recherche: Contribution à un journalArticleRevue par des pairs

Résumé

The design of tailored hardware has proven a successful strategy to reduce the timing analysis overhead for (hard) real-time systems. The stack cache is an example of such a design that was shown to provide good average-case performance, while remaining easy to analyze. So far, however, the analysis of the stack cache was limited to individual tasks, ignoring aspects related to multitasking. A major drawback of the original stack cache design is that, due to its simplicity, it cannot hold the data of multiple tasks at the same time. Consequently, the entire cache content needs to be saved and restored when a task is preempted. We propose (a) an analysis exploiting the simplicity of the stack cache to bound the overhead induced by task preemption, (b) preemption mechanisms for the stack cache exploiting the previous analysis and, finally, (c) an extension of the design that allows to (partially) hide the overhead by virtualizing stack caches.

langue originaleAnglais
Pages (de - à)700-744
Nombre de pages45
journalReal-Time Systems
Volume54
Numéro de publication3
Les DOIs
étatPublié - 1 juil. 2018
Modification externeOui

Empreinte digitale

Examiner les sujets de recherche de « Analysis of preemption costs for the stack cache ». Ensemble, ils forment une empreinte digitale unique.

Contient cette citation