TY - GEN
T1 - Analytical method for reliability assessment of concurrent checking circuits under multiple faults
AU - An, Ting
AU - Liu, Kaikai
AU - De Barros Naviner, Lirida Alves
PY - 2014/1/1
Y1 - 2014/1/1
N2 - Reliability issues due to transient faults have increased with CMOS scaling and become an important concern for deep submicron technologies. Concurrent Error Detection (CED) scheme has been widely used against transient faults under the assumption of single fault and/or fault-free checking parts. In this work, we propose an analytical method in order to assess CED circuit reliability under more realistic hypothesis. In other words, we take into account the occurrence of multiple faults and fault-prone checking parts. This method allows to demonstrate the efficiency of CED schemes. The computational requirements for such an assessment are reduced by progressive analysis of the overall circuit through conditional probabilities. The proposed solution has been demonstrated on classical CED schemes.
AB - Reliability issues due to transient faults have increased with CMOS scaling and become an important concern for deep submicron technologies. Concurrent Error Detection (CED) scheme has been widely used against transient faults under the assumption of single fault and/or fault-free checking parts. In this work, we propose an analytical method in order to assess CED circuit reliability under more realistic hypothesis. In other words, we take into account the occurrence of multiple faults and fault-prone checking parts. This method allows to demonstrate the efficiency of CED schemes. The computational requirements for such an assessment are reduced by progressive analysis of the overall circuit through conditional probabilities. The proposed solution has been demonstrated on classical CED schemes.
U2 - 10.1109/MIPRO.2014.6859532
DO - 10.1109/MIPRO.2014.6859532
M3 - Conference contribution
AN - SCOPUS:84906893401
SN - 9789532330816
T3 - 2014 37th International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO 2014 - Proceedings
SP - 56
EP - 59
BT - 2014 37th International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO 2014 - Proceedings
PB - IEEE Computer Society
T2 - 2014 37th International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO 2014
Y2 - 26 May 2014 through 30 May 2014
ER -