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Application specific processors for multimedia applications

  • Telecom Paris

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6 Citations (Scopus)

Résumé

A well-known challenge during processor design is to obtain best possible results for a typical target application domain by combining flexibility and computational performance. ASIPs (Application Specific Instruction Set Processors) provide a tradeo. between generality of processor (flexibility) and its physical characteristics (computational performance and silicon area). This paper evaluates an ASIP design methodology based on the extension of an existing instruction set and architecture described with LISA 2.0 language. The objective is to accelerate the ASIPs design process by using partially predefined, configurable RISC-like embedded processor cores that can be quickly tuned to given applications by means of ISE (Instruction Set Extension) techniques. A case study demonstrates the methodological approach for the JPEG algorithm and motion estimation encoding algorithm of H.264 encoding standard.

langue originaleAnglais
titreProceedings - 2008 IEEE 11th International Conference on Computational Science and Engineering, CSE 2008
EditeurIEEE Computer Society
Pages109-116
Nombre de pages8
ISBN (imprimé)9780769531939
Les DOIs
étatPublié - 1 janv. 2008
Evénement11th IEEE International Conference on Computational Science and Engineering, CSE 2008 - Sao Paulo, SP, Brésil
Durée: 16 juil. 200818 juil. 2008

Série de publications

NomProceedings - 2008 IEEE 11th International Conference on Computational Science and Engineering, CSE 2008

Une conférence

Une conférence11th IEEE International Conference on Computational Science and Engineering, CSE 2008
Pays/TerritoireBrésil
La villeSao Paulo, SP
période16/07/0818/07/08

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