Classification of lightweight block ciphers for specific processor accelerated implementations

Cryptography is a key element to the development of secure communication in embedded environments such as connected cars and IoT. For some specific applications specific Lightweight Block Ciphers (LBC) have emerged. Those algorithms have been designed to be less resource consuming and more flexible than standard cryptographic algorithms. In order to keep a high levels of performance for software implementation of those LBC, we propose to enhance the instruction set of microprocessors by adding custom instructions. This would allow the system designer to find the best compromise between flexibility requirements and efficiency in terms of throughput and latency. This paper first presents a classification of LBC according to their specific operations. Then, based on the open RISC-VISA, we propose a set of custom instructions to enhance LBC execution. The comparison of both execution time and throughput between different levels of processor customization is presented. Our results showed a significant gain as the execution time can be reduced by a factor between 20 and 100 for some classes of LBC.