TY - GEN
T1 - Decimation filter design for RSFQ ΣΔ converter
AU - Slimani, M.
AU - Guelaz, R.
AU - Desgreys, P.
AU - Loumeau, P.
PY - 2009/12/24
Y1 - 2009/12/24
N2 - In order to develop superconducting over-sampled AD converter, based on a band pass sigma delta modulator, we study a sinc decimation filter using top-down method: Matlab simulations are performed to determine filter specifications, VHDL behavioral model of the complete architecture (sigma delta AD converter, I/Q mixer and low pass decimation filter) is realized to validate decimation filter performance and finally SFQ elementary cells are implemented using VHDL-AMS tool.
AB - In order to develop superconducting over-sampled AD converter, based on a band pass sigma delta modulator, we study a sinc decimation filter using top-down method: Matlab simulations are performed to determine filter specifications, VHDL behavioral model of the complete architecture (sigma delta AD converter, I/Q mixer and low pass decimation filter) is realized to validate decimation filter performance and finally SFQ elementary cells are implemented using VHDL-AMS tool.
U2 - 10.1109/NEWCAS.2009.5290488
DO - 10.1109/NEWCAS.2009.5290488
M3 - Conference contribution
AN - SCOPUS:72249086579
SN - 9781424445738
T3 - 2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference, NEWCAS-TAISA '09
BT - 2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference, NEWCAS-TAISA '09
T2 - 2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference, NEWCAS-TAISA '09
Y2 - 28 June 2009 through 1 July 2009
ER -